Bilingual edition: English is preserved and Chinese follows each unit. Terminology uses the confirmed v20260916 glossary; automated semantic review remains traceable.
中英双语版:英文原文完整保留,中文紧随对应单元;术语采用 v20260916 确认表,自动语义审校结果可追溯。

Junction Field Effect Transistor

结型场效应晶体管

The common transistor is called a junction transistor, and it was the key device which led to the solid state electronics revolution. In application, the junction transistor has the disadvantage of a low input impedance because the base of the transistor is the signal input and the base-emitter diode is forward biased. Another device achieved transistor action with the input diode junction reversed biased, and this device is called a "field effect transistor" or a "junction field effect transistor", JFET. With the reverse biased input junction, it has a very high input impedance. Having a high input impedance minimizes the interference with or "loading" of the signal source when a measurement is made.

常见的晶体管称为结型晶体管,它是导致固体电子学革命的关键器件。在应用中,结型晶体管的缺点是输入阻抗较低,因为晶体管的基极是信号输入,而基极-发射极二极管处于正向偏置状态。另一种器件通过将输入二极管 junction 反向偏置实现了晶体管作用,这种器件称为“场效应晶体管”或“结型场效应晶体管”,即JFET。由于输入 junction 反向偏置,它具有非常高的输入阻抗。高输入阻抗可以最小化对信号源的干扰或“负载效应”,从而在测量时减少干扰。

For an n-channel FET, the device is constructed from a bar of n-type material, with the shaded areas composed of a p-type material as a Gate. Between the Source and the Drain, the n-type material acts as a resistor. The current flow consists of the majority carriers (electrons for n-type material).

对于n沟道FET,器件由一块n型材料制成,其中阴影区域由p型材料构成作为门极。在源极和漏极之间,n型材料起着电阻的作用。电流流动由多数载流子(对于n型材料而言是电子)组成。
Characteristic curves
特征曲线
Common source amplifier
常用源放大器

Since the Gate junction is reverse biased and because there is no minority carrier contribution to the flow through the device, the input impedance is extremely high.

由于门极结被反向偏置,并且通过器件的电流中没有少数载流子的贡献,因此输入阻抗非常高。

The control element for the JFET comes from depletion of charge carriers from the n-channel. When the Gate is made more negative, it depletes the majority carriers from a larger depletion zone around the gate. This reduces the current flow for a given value of Source-to-Drain voltage. Modulating the Gate voltage modulates the current flow through the device.

JFET的控制元件来源于从n型通道中耗尽载流子。当栅极更负时,它会从栅极周围更大的耗尽区中耗尽多数载流子。这会减少在给定的源极-漏极电压下的电流流动。调节栅极电压会调节通过器件的电流流动。
Index

Electronics concepts

Transistor varieties

Reference
Diefenderfer & Holton
Sec 8-7
索引 电子学概念 晶体管类型 参考 Diefenderfer & Holton 第8-7节
 
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IGFET

The insulated gate field effect transistor (IGFET) differs from the JFET by the addition of a silicon dioxide layer over the JFET and then a layer of silicon nitride. The result is a device which has even higher input impedance. The goal of extremely high input impedance allows an amplifier to sample some signal with minimal "loading" or interference with the signal source.

绝缘栅场效应晶体管(IGFET)与JFET的不同之处在于,在JFET上增加了二氧化硅层,然后是氮化硅层。结果是一种具有甚至更高输入阻抗的器件。极高的输入阻抗的目标允许放大器在最小的'负载'或对信号源干扰的情况下采样一些信号。

Common devices using this strategy are called MOSFETs, for metal oxide field effect transistors. They have achieved input impedances on the order of 1015 ohms.

采用这种策略的常见器件称为金属氧化物场效应晶体管(MOSFETs)。它们的输入阻抗可达10¹⁵欧姆量级。
Index

Electronics concepts

Transistor varieties

Reference
Diefenderfer & Holton
p170ff
索引 电子学概念 晶体管类型 参考 Diefenderfer & Holton p170ff
 
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JFET Characteristic Curves

JFET特性曲线

Characteristic curves for the JFET are shown at left. You can see that for a given value of Gate voltage, the current is very nearly constant over a wide range of Source-to-Drain voltages. The control element for the JFET comes from depletion of charge carriers from the n-channel. When the Gate is made more negative, it depletes the majority carriers from a larger depletion zone around the gate. This reduces the current flow for a given value of Source-to-Drain voltage. Modulating the Gate voltage modulates the current flow through the device.

JFET的特性曲线如左图所示。你可以看到,对于给定的栅极电压,漏源电压在一个宽范围内变化时,电流几乎保持不变。JFET的控制元件来自n通道中载流子的耗尽。当栅极变得更负时,它会从更大的耗尽区耗尽多数载流子。这会减少给定漏源电压下的电流。调节栅极电压会调节通过器件的电流。

The transfer characteristic for the JTET is useful for visualizing the gain from the device and identifying the region of linearity. The gain is proportional to the slope of the transfer curve. The current value IDSS represents the value when the Gate is shorted to ground, the maximum current for the device. This value will be part of the data supplied by the manufacturer. The Gate voltage at which the current reaches zero is called the "pinch voltage", VP. Note that the dashed line representing the gain in the linear region of operation strikes the zero current line at about half the pinch voltage.

JTET的传输特性对于可视化器件的增益以及确定线性区域很有用。增益与传输曲线的斜率成正比。当门极短接至接地时,电流值I DSS表示该器件的最大电流值。此值将作为制造商提供的数据之一。当电流达到零时的门极电压称为“夹断电压”,V P。请注意,在工作线性区域内的增益虚线大约在夹断电压的一半处与零电流线相交。
JFET discussion
JFET讨论
Common source amplifier
常用源放大器
Index

Electronics concepts

Transistor varieties

Reference
Diefenderfer & Holton
p170ff
索引 电子学概念 晶体管类型 参考 Diefenderfer & Holton p170ff
 
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Common Source JFET Amplifier

常用源极接法的JFET放大器

The most frequently encountered configuration for a JFET amplifier is the common source circuit. The source is common to the input and output as shown in the diagram.

JFET放大器中最常见的配置是共源电路。输入和输出共用源极,如图所示。
JFET discussion
JFET讨论
Characteristic curves
特征曲线
Index

Electronics concepts

Transistor varieties

Reference
Diefenderfer & Holton
Sec 8-8
索引 电子学概念 晶体管类型 参考 Diefenderfer & Holton 第8-8节
 
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